? semiconductor components industries, llc, 2011 april, 2011 ? rev. 1 1 publication order number: NTMS5835NL/d NTMS5835NL power mosfet 40 v, 12 a, 10 m features ? low r ds(on) ? low capacitance ? optimized gate charge ? these devices are pb ? free, halogen free/bfr free and are rohs compliant maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value unit drain ? to ? source voltage v dss 40 v gate ? to ? source voltage v gs 20 v continuous drain current r ja (note 1) steady state t a = 25 c i d 9.2 a t a = 70 c 7.4 power dissipation r ja (note 1) t a = 25 c p d 1.5 w t a = 70 c 1.0 continuous drain current r ja (note 1) t 10 s t a = 25 c i d 12 a t a = 70 c 9.6 power dissipation r ja (note 1) t a = 25 c p d 2.6 w t a = 70 c 1.6 pulsed drain current t p = 10 s i dm 48 a operating junction and storage temperature t j , t stg ? 55 to +150 c source current (body diode) i s 20 a single pulse drain ? to ? source avalanche energy (v dd = 40 v, v gs = 10 v, l = 0.1 mh eas 69 mj ias 37 a lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. thermal resistance maximum ratings parameter symbol value unit junction ? to ? ambient steady state (note 1) r ja 82 c/w junction ? to ? ambient ? t 10 s (note 1) r ja 49 junction ? to ? foot (drain) (note 1) r jf 21 junction ? to ? ambient steady state (note 2) r ja 121 1. surface ? mounted on fr4 board using 1 sq ? in pad (cu area = 1.127 in sq [2 oz] including traces). 2. surface ? mounted on fr4 board using 0.155 in sq (100mm 2 ) pad size. http://onsemi.com a = assembly location y = year ww = work week = pb ? free package v (br)dss r ds(on) max i d max 40 v 10 m @ 10 v 12 a 14 m @ 4.5 v g s n ? channel mosfet d device package shipping ? ordering information NTMS5835NLr2g so ? 8 (pb ? free) 2500/tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. (note: microdot may be in either location) so ? 8 case 751 style 12 marking diagram/ pin assignment 5835nl ayww 18 drain drain drain drain source source source gate top view 1 8
NTMS5835NL http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 40 v drain ? to ? source breakdown voltage temperature coefficient v (br)dss / t j 16 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 40 v t j = 25 c 1 a t j = 125 c 100 gate ? to ? source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 3) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.0 1.85 3.0 v negative threshold temperature coefficient v gs(th) /t j 7.0 mv/ c drain ? to ? source on resistance r ds(on) v gs = 10 v, i d = 10 a 8.2 10 m v gs = 4.5 v, i d = 10 a 10.3 14 forward transconductance g fs v ds = 15 v, i d = 10 a 10 s charges, capacitances & gate resistance input capacitance c iss v gs = 0 v, f = 1 mhz, v ds = 20 v 2115 pf output capacitance c oss 315 reverse transfer capacitance c rss 220 total gate charge q g(tot) v gs = 10 v, v ds = 20 v; i d = 10 a 40 50 nc v gs = 4.5 v, v ds = 20 v; i d = 10 a 20 23 threshold gate charge q g(th) 2.0 gate ? to ? source charge q gs 7.0 gate ? to ? drain charge q gd 9.5 plateau voltage v gp 3.3 v gate resistance r g 1.2 switching characteristics (note 4) turn ? on delay time t d(on) v gs = 4.5 v, v ds = 20 v, i d = 10 a, r g = 2.5 15 ns rise time t r 45 turn ? off delay time t d(off) 22 fall time t f 9.0 drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 10 a t j = 25 c 0.9 1.2 v t j = 125 c 0.785 reverse recovery time t rr v gs = 0 v, dis/dt = 100 a/ s, i s = 10 a 26 ns charge time t a 13 discharge time t b 13 reverse recovery charge q rr 17 nc 3. pulse test: pulse width 300 s, duty cycle 2%. 4. switching characteristics are independent of operating junction temperatures.
NTMS5835NL http://onsemi.com 3 typical performance curves 0 20 40 60 80 012345 v ds , drain ? to ? source voltage (v) i d, drain current (a) figure 1. on ? region characteristics t j = 25 c 4 v 3 v 3.4 v 3.6 v 4.5 v 10 v 5.5 v 6.5 v 8.5 v 0 10 20 30 40 50 60 70 80 2 2.5 3 3.5 4 4.5 5 figure 2. transfer characteristics v gs , gate ? to ? source voltage (v) i d, drain current (a) t j = 125 c t j = ? 55 c t j = 25 c v ds 5 v 0.005 0.015 0.025 345678910 figure 3. on ? resistance vs. gate ? to ? source voltage v gs , gate ? to ? source voltage (v) r ds(on), drain ? to ? source resistance ( ) t j = 25 c i d = 10 a 0.005 0.01 0.015 0.02 2 6 10 14 18 figure 4. on ? resistance vs. drain current and gate voltage t j = 25 c r ds(on), drain ? to ? source resistance ( ) v gs = 10 v v gs = 4.5 v i d, drain current (a) 0.6 0.8 1 1.2 1.4 1.6 50 25 0 25 50 75 100 125 150 figure 5. on ? resistance variation with temperature t j , junction temperature ( c) v gs = 4.5 v i d = 10 a r ds(on), drain ? to ? source resistance (normalized) 1000 10000 100000 10 20 30 40 figure 6. drain ? to ? source leakage current vs. voltage v ds , drain ? to ? source voltage (v) v gs = 0 v i dss , leakage (na) t j = 125 c t j = 150 c
NTMS5835NL http://onsemi.com 4 typical performance curves 0 500 1000 1500 2000 2500 3000 010203040 figure 7. capacitance variation v ds , drain ? to ? source voltage (v) c, capacitance (pf) t j = 25 c c iss c oss c rss v gs = 0 v 0 1 2 3 4 5 6 7 8 9 10 0 5 10 15 20 25 30 35 40 figure 8. gate ? to ? source and drain ? to ? source voltage vs. total charge q g , total gate charge (nc) v gs , gate ? to ? source (v) v ds , drain ? to ? source (v) i d = 10 a t j = 25 c q gs q gd q t v gs 10 100 1000 1 10 100 figure 9. resistive switching time variation vs. gate resistance r g , gate resistance ( ) t, time (ns) v ds = 20 v i d = 10 a v gs = 4.5 v t r t d(on) t f t d(off) 0 4 8 12 16 20 24 0.4 0.6 0.8 1 v sd , source ? to ? drain voltage (v) i s , source current (a) v gs = 0 v t j = 25 c figure 10. diode forward voltage vs. current 0.001 0.01 0.1 1 10 100 0.01 0.1 1 10 100 figure 11. maximum rated forward biased safe operating area v ds , drain ? to ? source voltage (v) i d , drain current (a) r ds(on) limit thermal limit package limit v gs = 10 v single pulse t c = 25 c dc 10 ms 1 ms 100 s 10 s 0 25 50 75 25 50 75 100 125 150 t j , starting junction temperature ( c) eas, single pulse drain ? to ? source avalanche energy (mj) i d = 37 a figure 12. maximum avalanche energy vs. starting junction temperature
NTMS5835NL http://onsemi.com 5 typical performance curves figure 13. thermal response t, pulse time (s) d = 0.5 single pulse 0.2 0.05 0.01 0.1 0.02 r(t) ( c/w) 0.01 0.1 1 10 100 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
NTMS5835NL http://onsemi.com 6 package dimensions soic ? 8 nb case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* style 12: pin 1. source 2. source 3. source 4. gate 5. drain 6. drain 7. drain 8. drain on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 NTMS5835NL/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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